#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - Port selection register"]
    pub port_sel0: crate::Reg<port_sel0::PORT_SEL0_SPEC>,
    _reserved1: [u8; 252usize],
    #[doc = "0x100 - Port selection register"]
    pub port_sel1: crate::Reg<port_sel1::PORT_SEL1_SPEC>,
    _reserved2: [u8; 252usize],
    #[doc = "0x200 - Port selection register"]
    pub port_sel2: crate::Reg<port_sel2::PORT_SEL2_SPEC>,
    _reserved3: [u8; 252usize],
    #[doc = "0x300 - Port selection register"]
    pub port_sel3: crate::Reg<port_sel3::PORT_SEL3_SPEC>,
    _reserved4: [u8; 252usize],
    #[doc = "0x400 - Port selection register"]
    pub port_sel4: crate::Reg<port_sel4::PORT_SEL4_SPEC>,
    _reserved5: [u8; 252usize],
    #[doc = "0x500 - Port selection register"]
    pub port_sel5: crate::Reg<port_sel5::PORT_SEL5_SPEC>,
    _reserved6: [u8; 252usize],
    #[doc = "0x600 - Port selection register"]
    pub port_sel6: crate::Reg<port_sel6::PORT_SEL6_SPEC>,
    _reserved7: [u8; 252usize],
    #[doc = "0x700 - Port selection register"]
    pub port_sel7: crate::Reg<port_sel7::PORT_SEL7_SPEC>,
    _reserved8: [u8; 252usize],
    #[doc = "0x800 - Port selection register"]
    pub port_sel8: crate::Reg<port_sel8::PORT_SEL8_SPEC>,
    _reserved9: [u8; 252usize],
    #[doc = "0x900 - Port selection register"]
    pub port_sel9: crate::Reg<port_sel9::PORT_SEL9_SPEC>,
    _reserved10: [u8; 252usize],
    #[doc = "0xa00 - Port selection register"]
    pub port_sel10: crate::Reg<port_sel10::PORT_SEL10_SPEC>,
    _reserved11: [u8; 252usize],
    #[doc = "0xb00 - Port selection register"]
    pub port_sel11: crate::Reg<port_sel11::PORT_SEL11_SPEC>,
    _reserved12: [u8; 252usize],
    #[doc = "0xc00 - Port selection register"]
    pub port_sel12: crate::Reg<port_sel12::PORT_SEL12_SPEC>,
    _reserved13: [u8; 252usize],
    #[doc = "0xd00 - Port selection register"]
    pub port_sel13: crate::Reg<port_sel13::PORT_SEL13_SPEC>,
    _reserved14: [u8; 5116usize],
    #[doc = "0x2100 - AMUX splitter cell control"]
    pub amux_split_ctl0: crate::Reg<amux_split_ctl0::AMUX_SPLIT_CTL0_SPEC>,
    #[doc = "0x2104 - AMUX splitter cell control"]
    pub amux_split_ctl1: crate::Reg<amux_split_ctl1::AMUX_SPLIT_CTL1_SPEC>,
    #[doc = "0x2108 - AMUX splitter cell control"]
    pub amux_split_ctl2: crate::Reg<amux_split_ctl2::AMUX_SPLIT_CTL2_SPEC>,
}
#[doc = "PORT_SEL0 register accessor: an alias for `Reg<PORT_SEL0_SPEC>`"]
pub type PORT_SEL0 = crate::Reg<port_sel0::PORT_SEL0_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel0;
#[doc = "PORT_SEL1 register accessor: an alias for `Reg<PORT_SEL1_SPEC>`"]
pub type PORT_SEL1 = crate::Reg<port_sel1::PORT_SEL1_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel1;
#[doc = "PORT_SEL2 register accessor: an alias for `Reg<PORT_SEL2_SPEC>`"]
pub type PORT_SEL2 = crate::Reg<port_sel2::PORT_SEL2_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel2;
#[doc = "PORT_SEL3 register accessor: an alias for `Reg<PORT_SEL3_SPEC>`"]
pub type PORT_SEL3 = crate::Reg<port_sel3::PORT_SEL3_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel3;
#[doc = "PORT_SEL4 register accessor: an alias for `Reg<PORT_SEL4_SPEC>`"]
pub type PORT_SEL4 = crate::Reg<port_sel4::PORT_SEL4_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel4;
#[doc = "PORT_SEL5 register accessor: an alias for `Reg<PORT_SEL5_SPEC>`"]
pub type PORT_SEL5 = crate::Reg<port_sel5::PORT_SEL5_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel5;
#[doc = "PORT_SEL6 register accessor: an alias for `Reg<PORT_SEL6_SPEC>`"]
pub type PORT_SEL6 = crate::Reg<port_sel6::PORT_SEL6_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel6;
#[doc = "PORT_SEL7 register accessor: an alias for `Reg<PORT_SEL7_SPEC>`"]
pub type PORT_SEL7 = crate::Reg<port_sel7::PORT_SEL7_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel7;
#[doc = "PORT_SEL8 register accessor: an alias for `Reg<PORT_SEL8_SPEC>`"]
pub type PORT_SEL8 = crate::Reg<port_sel8::PORT_SEL8_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel8;
#[doc = "PORT_SEL9 register accessor: an alias for `Reg<PORT_SEL9_SPEC>`"]
pub type PORT_SEL9 = crate::Reg<port_sel9::PORT_SEL9_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel9;
#[doc = "PORT_SEL10 register accessor: an alias for `Reg<PORT_SEL10_SPEC>`"]
pub type PORT_SEL10 = crate::Reg<port_sel10::PORT_SEL10_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel10;
#[doc = "PORT_SEL11 register accessor: an alias for `Reg<PORT_SEL11_SPEC>`"]
pub type PORT_SEL11 = crate::Reg<port_sel11::PORT_SEL11_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel11;
#[doc = "PORT_SEL12 register accessor: an alias for `Reg<PORT_SEL12_SPEC>`"]
pub type PORT_SEL12 = crate::Reg<port_sel12::PORT_SEL12_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel12;
#[doc = "PORT_SEL13 register accessor: an alias for `Reg<PORT_SEL13_SPEC>`"]
pub type PORT_SEL13 = crate::Reg<port_sel13::PORT_SEL13_SPEC>;
#[doc = "Port selection register"]
pub mod port_sel13;
#[doc = "AMUX_SPLIT_CTL0 register accessor: an alias for `Reg<AMUX_SPLIT_CTL0_SPEC>`"]
pub type AMUX_SPLIT_CTL0 = crate::Reg<amux_split_ctl0::AMUX_SPLIT_CTL0_SPEC>;
#[doc = "AMUX splitter cell control"]
pub mod amux_split_ctl0;
#[doc = "AMUX_SPLIT_CTL1 register accessor: an alias for `Reg<AMUX_SPLIT_CTL1_SPEC>`"]
pub type AMUX_SPLIT_CTL1 = crate::Reg<amux_split_ctl1::AMUX_SPLIT_CTL1_SPEC>;
#[doc = "AMUX splitter cell control"]
pub mod amux_split_ctl1;
#[doc = "AMUX_SPLIT_CTL2 register accessor: an alias for `Reg<AMUX_SPLIT_CTL2_SPEC>`"]
pub type AMUX_SPLIT_CTL2 = crate::Reg<amux_split_ctl2::AMUX_SPLIT_CTL2_SPEC>;
#[doc = "AMUX splitter cell control"]
pub mod amux_split_ctl2;
