#[doc = "Register `STATUS_SRC_ADDR` reader"]
pub struct R(crate::R<STATUS_SRC_ADDR_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<STATUS_SRC_ADDR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<STATUS_SRC_ADDR_SPEC>> for R {
    fn from(reader: crate::R<STATUS_SRC_ADDR_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `STATUS_SRC_ADDR` writer"]
pub struct W(crate::W<STATUS_SRC_ADDR_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<STATUS_SRC_ADDR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<STATUS_SRC_ADDR_SPEC>> for W {
    fn from(writer: crate::W<STATUS_SRC_ADDR_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `ADDR` reader - Base address or current address of source location of currently active channel. The specific address information is cycle dependent. This is field is provided for debug purposes. Functionally, no assumption should be made on whether the base or current address is provided. The specifics of the currently active channel are available through STATUS. Note while reading the STATUS, STATUS_SRC and STATUS_DST registers, the transfer engine may have moved from one active channel to another."]
pub struct ADDR_R(crate::FieldReader<u32, u32>);
impl ADDR_R {
    pub(crate) fn new(bits: u32) -> Self {
        ADDR_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for ADDR_R {
    type Target = crate::FieldReader<u32, u32>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl R {
    #[doc = "Bits 0:31 - Base address or current address of source location of currently active channel. The specific address information is cycle dependent. This is field is provided for debug purposes. Functionally, no assumption should be made on whether the base or current address is provided. The specifics of the currently active channel are available through STATUS. Note while reading the STATUS, STATUS_SRC and STATUS_DST registers, the transfer engine may have moved from one active channel to another."]
    #[inline(always)]
    pub fn addr(&self) -> ADDR_R {
        ADDR_R::new((self.bits & 0xffff_ffff) as u32)
    }
}
impl W {
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Source address status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status_src_addr](index.html) module"]
pub struct STATUS_SRC_ADDR_SPEC;
impl crate::RegisterSpec for STATUS_SRC_ADDR_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [status_src_addr::R](R) reader structure"]
impl crate::Readable for STATUS_SRC_ADDR_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [status_src_addr::W](W) writer structure"]
impl crate::Writable for STATUS_SRC_ADDR_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets STATUS_SRC_ADDR to value 0"]
impl crate::Resettable for STATUS_SRC_ADDR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
