#[doc = "Register `SAMPLE_TIME01` reader"]
pub struct R(crate::R<SAMPLE_TIME01_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<SAMPLE_TIME01_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<SAMPLE_TIME01_SPEC>> for R {
    fn from(reader: crate::R<SAMPLE_TIME01_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `SAMPLE_TIME01` writer"]
pub struct W(crate::W<SAMPLE_TIME01_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<SAMPLE_TIME01_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<SAMPLE_TIME01_SPEC>> for W {
    fn from(writer: crate::W<SAMPLE_TIME01_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `SAMPLE_TIME0` reader - Sample time0 (aperture) in ADC clock cycles. Note that actual sample time is half a clock less than specified here. The minimum sample time is 194ns, which is 3.5 cycles (4 in this field) with an 18MHz clock. Minimum legal value in this register is 2."]
pub struct SAMPLE_TIME0_R(crate::FieldReader<u16, u16>);
impl SAMPLE_TIME0_R {
    pub(crate) fn new(bits: u16) -> Self {
        SAMPLE_TIME0_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for SAMPLE_TIME0_R {
    type Target = crate::FieldReader<u16, u16>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `SAMPLE_TIME0` writer - Sample time0 (aperture) in ADC clock cycles. Note that actual sample time is half a clock less than specified here. The minimum sample time is 194ns, which is 3.5 cycles (4 in this field) with an 18MHz clock. Minimum legal value in this register is 2."]
pub struct SAMPLE_TIME0_W<'a> {
    w: &'a mut W,
}
impl<'a> SAMPLE_TIME0_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x03ff) | (value as u32 & 0x03ff);
        self.w
    }
}
#[doc = "Field `SAMPLE_TIME1` reader - Sample time1"]
pub struct SAMPLE_TIME1_R(crate::FieldReader<u16, u16>);
impl SAMPLE_TIME1_R {
    pub(crate) fn new(bits: u16) -> Self {
        SAMPLE_TIME1_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for SAMPLE_TIME1_R {
    type Target = crate::FieldReader<u16, u16>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `SAMPLE_TIME1` writer - Sample time1"]
pub struct SAMPLE_TIME1_W<'a> {
    w: &'a mut W,
}
impl<'a> SAMPLE_TIME1_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03ff << 16)) | ((value as u32 & 0x03ff) << 16);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:9 - Sample time0 (aperture) in ADC clock cycles. Note that actual sample time is half a clock less than specified here. The minimum sample time is 194ns, which is 3.5 cycles (4 in this field) with an 18MHz clock. Minimum legal value in this register is 2."]
    #[inline(always)]
    pub fn sample_time0(&self) -> SAMPLE_TIME0_R {
        SAMPLE_TIME0_R::new((self.bits & 0x03ff) as u16)
    }
    #[doc = "Bits 16:25 - Sample time1"]
    #[inline(always)]
    pub fn sample_time1(&self) -> SAMPLE_TIME1_R {
        SAMPLE_TIME1_R::new(((self.bits >> 16) & 0x03ff) as u16)
    }
}
impl W {
    #[doc = "Bits 0:9 - Sample time0 (aperture) in ADC clock cycles. Note that actual sample time is half a clock less than specified here. The minimum sample time is 194ns, which is 3.5 cycles (4 in this field) with an 18MHz clock. Minimum legal value in this register is 2."]
    #[inline(always)]
    pub fn sample_time0(&mut self) -> SAMPLE_TIME0_W {
        SAMPLE_TIME0_W { w: self }
    }
    #[doc = "Bits 16:25 - Sample time1"]
    #[inline(always)]
    pub fn sample_time1(&mut self) -> SAMPLE_TIME1_W {
        SAMPLE_TIME1_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Sample time specification ST0 and ST1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sample_time01](index.html) module"]
pub struct SAMPLE_TIME01_SPEC;
impl crate::RegisterSpec for SAMPLE_TIME01_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [sample_time01::R](R) reader structure"]
impl crate::Readable for SAMPLE_TIME01_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [sample_time01::W](W) writer structure"]
impl crate::Writable for SAMPLE_TIME01_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets SAMPLE_TIME01 to value 0"]
impl crate::Resettable for SAMPLE_TIME01_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
