#[doc = "Register `MODE` reader"]
pub struct R(crate::R<MODE_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<MODE_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<MODE_SPEC>> for R {
    fn from(reader: crate::R<MODE_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `MODE` writer"]
pub struct W(crate::W<MODE_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<MODE_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<MODE_SPEC>> for W {
    fn from(writer: crate::W<MODE_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `SWD_CONNECTED` reader - 0: SWD not active?1: SWD activated (Line Reset & Connect sequence passed)?(Note: this bit replaces TST_CTRL.SWD_CONNECTED and is present in all M0S8 products except TSG4)"]
pub struct SWD_CONNECTED_R(crate::FieldReader<bool, bool>);
impl SWD_CONNECTED_R {
    pub(crate) fn new(bits: bool) -> Self {
        SWD_CONNECTED_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for SWD_CONNECTED_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `POR_BYPASS` reader - This bit is set during POR bypass mode. When this bit is set, the BootROM will not yield execution to the FLASH image (same function as setting TEST_MODE bit below)."]
pub struct POR_BYPASS_R(crate::FieldReader<bool, bool>);
impl POR_BYPASS_R {
    pub(crate) fn new(bits: bool) -> Self {
        POR_BYPASS_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for POR_BYPASS_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `TEST_MODE` reader - 0: Normal operation mode?1: Test mode (any test mode)?Setting this bit will prevent BootROM from yielding execution to Flash image."]
pub struct TEST_MODE_R(crate::FieldReader<bool, bool>);
impl TEST_MODE_R {
    pub(crate) fn new(bits: bool) -> Self {
        TEST_MODE_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for TEST_MODE_R {
    type Target = crate::FieldReader<bool, bool>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `TEST_MODE` writer - 0: Normal operation mode?1: Test mode (any test mode)?Setting this bit will prevent BootROM from yielding execution to Flash image."]
pub struct TEST_MODE_W<'a> {
    w: &'a mut W,
}
impl<'a> TEST_MODE_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
        self.w
    }
}
impl R {
    #[doc = "Bit 2 - 0: SWD not active?1: SWD activated (Line Reset & Connect sequence passed)?(Note: this bit replaces TST_CTRL.SWD_CONNECTED and is present in all M0S8 products except TSG4)"]
    #[inline(always)]
    pub fn swd_connected(&self) -> SWD_CONNECTED_R {
        SWD_CONNECTED_R::new(((self.bits >> 2) & 0x01) != 0)
    }
    #[doc = "Bit 30 - This bit is set during POR bypass mode. When this bit is set, the BootROM will not yield execution to the FLASH image (same function as setting TEST_MODE bit below)."]
    #[inline(always)]
    pub fn por_bypass(&self) -> POR_BYPASS_R {
        POR_BYPASS_R::new(((self.bits >> 30) & 0x01) != 0)
    }
    #[doc = "Bit 31 - 0: Normal operation mode?1: Test mode (any test mode)?Setting this bit will prevent BootROM from yielding execution to Flash image."]
    #[inline(always)]
    pub fn test_mode(&self) -> TEST_MODE_R {
        TEST_MODE_R::new(((self.bits >> 31) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bit 31 - 0: Normal operation mode?1: Test mode (any test mode)?Setting this bit will prevent BootROM from yielding execution to Flash image."]
    #[inline(always)]
    pub fn test_mode(&mut self) -> TEST_MODE_W {
        TEST_MODE_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Test Mode Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
pub struct MODE_SPEC;
impl crate::RegisterSpec for MODE_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [mode::R](R) reader structure"]
impl crate::Readable for MODE_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
impl crate::Writable for MODE_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets MODE to value 0"]
impl crate::Resettable for MODE_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
