#[doc = "Register `ALT_EA_E` reader"]
pub struct R(crate::R<ALT_EA_E_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<ALT_EA_E_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<ALT_EA_E_SPEC>> for R {
    fn from(reader: crate::R<ALT_EA_E_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `ALT_EA_E` writer"]
pub struct W(crate::W<ALT_EA_E_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<ALT_EA_E_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<ALT_EA_E_SPEC>> for W {
    fn from(writer: crate::W<ALT_EA_E_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `PERIOD` reader - Period of timer in clk_spcif_timer ticks. For regular FLASH, clock is 36MHz from dedicated oscillator. For FLASH-Lite, clock is same as clk_hf, which must be set to 48MHz for 48MHz devices and 12MHz for max 16MHz devices"]
pub struct PERIOD_R(crate::FieldReader<u32, u32>);
impl PERIOD_R {
    pub(crate) fn new(bits: u32) -> Self {
        PERIOD_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for PERIOD_R {
    type Target = crate::FieldReader<u32, u32>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `PERIOD` writer - Period of timer in clk_spcif_timer ticks. For regular FLASH, clock is 36MHz from dedicated oscillator. For FLASH-Lite, clock is same as clk_hf, which must be set to 48MHz for 48MHz devices and 12MHz for max 16MHz devices"]
pub struct PERIOD_W<'a> {
    w: &'a mut W,
}
impl<'a> PERIOD_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u32) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff);
        self.w
    }
}
#[doc = "Field `PDAC` reader - PDAC input. Each increment in PDAC causes an increase of ~0.10V in VPOS"]
pub struct PDAC_R(crate::FieldReader<u8, u8>);
impl PDAC_R {
    pub(crate) fn new(bits: u8) -> Self {
        PDAC_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for PDAC_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `PDAC` writer - PDAC input. Each increment in PDAC causes an increase of ~0.10V in VPOS"]
pub struct PDAC_W<'a> {
    w: &'a mut W,
}
impl<'a> PDAC_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24);
        self.w
    }
}
#[doc = "Field `NDAC` reader - NDAC input. Each increment in NDAC causes an increase of ~0.10V in VNEG"]
pub struct NDAC_R(crate::FieldReader<u8, u8>);
impl NDAC_R {
    pub(crate) fn new(bits: u8) -> Self {
        NDAC_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for NDAC_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `NDAC` writer - NDAC input. Each increment in NDAC causes an increase of ~0.10V in VNEG"]
pub struct NDAC_W<'a> {
    w: &'a mut W,
}
impl<'a> NDAC_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:23 - Period of timer in clk_spcif_timer ticks. For regular FLASH, clock is 36MHz from dedicated oscillator. For FLASH-Lite, clock is same as clk_hf, which must be set to 48MHz for 48MHz devices and 12MHz for max 16MHz devices"]
    #[inline(always)]
    pub fn period(&self) -> PERIOD_R {
        PERIOD_R::new((self.bits & 0x00ff_ffff) as u32)
    }
    #[doc = "Bits 24:27 - PDAC input. Each increment in PDAC causes an increase of ~0.10V in VPOS"]
    #[inline(always)]
    pub fn pdac(&self) -> PDAC_R {
        PDAC_R::new(((self.bits >> 24) & 0x0f) as u8)
    }
    #[doc = "Bits 28:31 - NDAC input. Each increment in NDAC causes an increase of ~0.10V in VNEG"]
    #[inline(always)]
    pub fn ndac(&self) -> NDAC_R {
        NDAC_R::new(((self.bits >> 28) & 0x0f) as u8)
    }
}
impl W {
    #[doc = "Bits 0:23 - Period of timer in clk_spcif_timer ticks. For regular FLASH, clock is 36MHz from dedicated oscillator. For FLASH-Lite, clock is same as clk_hf, which must be set to 48MHz for 48MHz devices and 12MHz for max 16MHz devices"]
    #[inline(always)]
    pub fn period(&mut self) -> PERIOD_W {
        PERIOD_W { w: self }
    }
    #[doc = "Bits 24:27 - PDAC input. Each increment in PDAC causes an increase of ~0.10V in VPOS"]
    #[inline(always)]
    pub fn pdac(&mut self) -> PDAC_W {
        PDAC_W { w: self }
    }
    #[doc = "Bits 28:31 - NDAC input. Each increment in NDAC causes an increase of ~0.10V in VNEG"]
    #[inline(always)]
    pub fn ndac(&mut self) -> NDAC_W {
        NDAC_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Erase All - Erase Settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alt_ea_e](index.html) module"]
pub struct ALT_EA_E_SPEC;
impl crate::RegisterSpec for ALT_EA_E_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [alt_ea_e::R](R) reader structure"]
impl crate::Readable for ALT_EA_E_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [alt_ea_e::W](W) writer structure"]
impl crate::Writable for ALT_EA_E_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets ALT_EA_E to value 0"]
impl crate::Resettable for ALT_EA_E_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
