#[doc = "Register `SCIOIN` reader"]
pub struct R(crate::R<SCIOIN_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<SCIOIN_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<SCIOIN_SPEC>> for R {
    fn from(reader: crate::R<SCIOIN_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `SCIOIN` writer"]
pub struct W(crate::W<SCIOIN_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<SCIOIN_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<SCIOIN_SPEC>> for W {
    fn from(writer: crate::W<SCIOIN_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `PI_TOP` reader - RAM configuration nibble for TOP UDB port interface configuration"]
pub struct PI_TOP_R(crate::FieldReader<u8, u8>);
impl PI_TOP_R {
    pub(crate) fn new(bits: u8) -> Self {
        PI_TOP_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for PI_TOP_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `PI_TOP` writer - RAM configuration nibble for TOP UDB port interface configuration"]
pub struct PI_TOP_W<'a> {
    w: &'a mut W,
}
impl<'a> PI_TOP_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x0f) | (value as u8 & 0x0f);
        self.w
    }
}
#[doc = "Field `PI_BOT` reader - RAM configuration nibble for BOTTOM UDB port interface configuration"]
pub struct PI_BOT_R(crate::FieldReader<u8, u8>);
impl PI_BOT_R {
    pub(crate) fn new(bits: u8) -> Self {
        PI_BOT_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for PI_BOT_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `PI_BOT` writer - RAM configuration nibble for BOTTOM UDB port interface configuration"]
pub struct PI_BOT_W<'a> {
    w: &'a mut W,
}
impl<'a> PI_BOT_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u8 & 0x0f) << 4);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:3 - RAM configuration nibble for TOP UDB port interface configuration"]
    #[inline(always)]
    pub fn pi_top(&self) -> PI_TOP_R {
        PI_TOP_R::new((self.bits & 0x0f) as u8)
    }
    #[doc = "Bits 4:7 - RAM configuration nibble for BOTTOM UDB port interface configuration"]
    #[inline(always)]
    pub fn pi_bot(&self) -> PI_BOT_R {
        PI_BOT_R::new(((self.bits >> 4) & 0x0f) as u8)
    }
}
impl W {
    #[doc = "Bits 0:3 - RAM configuration nibble for TOP UDB port interface configuration"]
    #[inline(always)]
    pub fn pi_top(&mut self) -> PI_TOP_W {
        PI_TOP_W { w: self }
    }
    #[doc = "Bits 4:7 - RAM configuration nibble for BOTTOM UDB port interface configuration"]
    #[inline(always)]
    pub fn pi_bot(&mut self) -> PI_BOT_W {
        PI_BOT_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "UDB Channel PI Tile Configuration; Status / Control Blocks Input / Output Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scioin](index.html) module"]
pub struct SCIOIN_SPEC;
impl crate::RegisterSpec for SCIOIN_SPEC {
    type Ux = u8;
}
#[doc = "`read()` method returns [scioin::R](R) reader structure"]
impl crate::Readable for SCIOIN_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [scioin::W](W) writer structure"]
impl crate::Writable for SCIOIN_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets SCIOIN to value 0"]
impl crate::Resettable for SCIOIN_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
