#[doc = "Register `CTL0` reader"]
pub struct R(crate::R<CTL0_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<CTL0_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<CTL0_SPEC>> for R {
    fn from(reader: crate::R<CTL0_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `CTL0` writer"]
pub struct W(crate::W<CTL0_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<CTL0_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<CTL0_SPEC>> for W {
    fn from(writer: crate::W<CTL0_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `CTL_0` reader - Control register for UDB\\[n\\]"]
pub struct CTL_0_R(crate::FieldReader<u8, u8>);
impl CTL_0_R {
    pub(crate) fn new(bits: u8) -> Self {
        CTL_0_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for CTL_0_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `CTL_0` writer - Control register for UDB\\[n\\]"]
pub struct CTL_0_W<'a> {
    w: &'a mut W,
}
impl<'a> CTL_0_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff);
        self.w
    }
}
#[doc = "Field `CTL_1` reader - Control register for UDB\\[n+1\\]"]
pub struct CTL_1_R(crate::FieldReader<u8, u8>);
impl CTL_1_R {
    pub(crate) fn new(bits: u8) -> Self {
        CTL_1_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for CTL_1_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `CTL_1` writer - Control register for UDB\\[n+1\\]"]
pub struct CTL_1_W<'a> {
    w: &'a mut W,
}
impl<'a> CTL_1_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8);
        self.w
    }
}
#[doc = "Field `CTL_2` reader - Control register for UDB\\[n+2\\]"]
pub struct CTL_2_R(crate::FieldReader<u8, u8>);
impl CTL_2_R {
    pub(crate) fn new(bits: u8) -> Self {
        CTL_2_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for CTL_2_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `CTL_2` writer - Control register for UDB\\[n+2\\]"]
pub struct CTL_2_W<'a> {
    w: &'a mut W,
}
impl<'a> CTL_2_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16);
        self.w
    }
}
#[doc = "Field `CTL_3` reader - Control register for UDB\\[n+3\\]"]
pub struct CTL_3_R(crate::FieldReader<u8, u8>);
impl CTL_3_R {
    pub(crate) fn new(bits: u8) -> Self {
        CTL_3_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for CTL_3_R {
    type Target = crate::FieldReader<u8, u8>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `CTL_3` writer - Control register for UDB\\[n+3\\]"]
pub struct CTL_3_W<'a> {
    w: &'a mut W,
}
impl<'a> CTL_3_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:7 - Control register for UDB\\[n\\]"]
    #[inline(always)]
    pub fn ctl_0(&self) -> CTL_0_R {
        CTL_0_R::new((self.bits & 0xff) as u8)
    }
    #[doc = "Bits 8:15 - Control register for UDB\\[n+1\\]"]
    #[inline(always)]
    pub fn ctl_1(&self) -> CTL_1_R {
        CTL_1_R::new(((self.bits >> 8) & 0xff) as u8)
    }
    #[doc = "Bits 16:23 - Control register for UDB\\[n+2\\]"]
    #[inline(always)]
    pub fn ctl_2(&self) -> CTL_2_R {
        CTL_2_R::new(((self.bits >> 16) & 0xff) as u8)
    }
    #[doc = "Bits 24:31 - Control register for UDB\\[n+3\\]"]
    #[inline(always)]
    pub fn ctl_3(&self) -> CTL_3_R {
        CTL_3_R::new(((self.bits >> 24) & 0xff) as u8)
    }
}
impl W {
    #[doc = "Bits 0:7 - Control register for UDB\\[n\\]"]
    #[inline(always)]
    pub fn ctl_0(&mut self) -> CTL_0_W {
        CTL_0_W { w: self }
    }
    #[doc = "Bits 8:15 - Control register for UDB\\[n+1\\]"]
    #[inline(always)]
    pub fn ctl_1(&mut self) -> CTL_1_W {
        CTL_1_W { w: self }
    }
    #[doc = "Bits 16:23 - Control register for UDB\\[n+2\\]"]
    #[inline(always)]
    pub fn ctl_2(&mut self) -> CTL_2_W {
        CTL_2_W { w: self }
    }
    #[doc = "Bits 24:31 - Control register for UDB\\[n+3\\]"]
    #[inline(always)]
    pub fn ctl_3(&mut self) -> CTL_3_W {
        CTL_3_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"]
pub struct CTL0_SPEC;
impl crate::RegisterSpec for CTL0_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [ctl0::R](R) reader structure"]
impl crate::Readable for CTL0_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"]
impl crate::Writable for CTL0_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets CTL0 to value 0"]
impl crate::Resettable for CTL0_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
